cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 1/6 DTC115TC3 cystek product specification npn digital transistors (built-in resistors) DTC115TC3 features ? built-in bias resistors enable the co nfiguration of an inverter circu it without connecting external input resistors (see equivalent circuit). ? the bias resistors consist of thin -film resistors with complete isolat ion to allow negative biasing of the input. they also have the advantage of almost completely eliminating parasitic effects. ? only the on/off conditions need to be set for operation, making device design easy. ? complements the dta115tc3 equivalent circuit outline DTC115TC3 r1 b c e r1=100 k b base c collector e emitter sot-523 c b e absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage v cbo 50 v collector-emitter voltage v ceo 50 v emitter-base voltage v ebo 5 v collector current i c 100 ma power dissipation pd 150 mw junction temperature tj 150 c storage temperature tstg -55~+150 c
cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 2/6 DTC115TC3 cystek product specification electrical characteristics (ta=25 c) parameter symbol min. typ. max. unit test conditions collector-base breakdown voltage v cbo 50 - - v i c =50 a collector-emitter breakdown voltage v ceo 50 - - v i c =1ma emitter-base breakdown voltage v ebo 5 - - v i e =50 a collector-base cutoff current i cbo - - 0.5 a v cb =50v emitter-base cutoff current i ebo - - 0.5 a v eb =4v collector-emitter saturation voltage v ce(sat) - - 0.3 v i c =1ma, i b =0.1ma dc current gain h fe 100 - 600 - v ce =5v, i c =1ma input resistance r 70 100 130 k - transition frequency f t - 250 - mhz v ce =10v, i c =5ma, f=100mhz * * transition frequency of the devic e ordering information device package shipping marking DTC115TC3 sot-523 (pb-free & halogen-free package ) 3000 pcs / tape & reel 8u
cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 3/6 DTC115TC3 cystek product specification characteristic curves current gain vs collector current 10 100 1000 0.1 1 10 100 collector current---ic(ma) current gain--- hfe hfe@vce=5v saturation voltage vs collector current 10 100 1000 0.1 1 10 100 collector current --- ic(ma) saturation voltage---(mv) vcesat@ic=10ib vcesat@ic=20ib power derating curve 0 20 40 60 80 100 120 140 160 0 50 100 150 200 ambient temperature --- ta( ) power dissipation---pd(mw)
cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 4/6 DTC115TC3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 5/6 DTC115TC3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c358c3 issued date : 2004.03.09 revised date : 2012.07.19 page no. : 6/6 DTC115TC3 cystek product specification sot-523 dimension *: typical inches style: pin 1.base 2.emitter 3.collector 3-lead sot-523 plastic surface mounted package cystek package code: c3 marking: 8u 1 3 2 millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.028 0.035 0.700 0.900 e 0.028 0.035 0.700 0.900 a1 0.000 0.004 0.000 0.100 e1 0.057 0.069 1.450 1.750 a2 0.028 0.031 0.700 0.800 e 0.020* 0.500* b1 0.006 0.010 0.150 0.250 e1 0.035 0.043 0.900 1.100 b2 0.010 0.014 0.250 0.350 l 0.016 ref 0.400 ref c 0.004 0.008 0.100 0.200 l1 0.010 0.018 0.260 0.460 d 0.059 0.067 1.500 1.700 0 8 0 8 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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